Authoritative Guide: FPGA VS ASIC

Authoritative Guide: FPGA VS ASIC

Although FPGAs have been dazzling in the field of chip design in recent years and have gradually replaced ASICs, ASICs are still widely used in their dedicated fields. Many people are not particularly aware of the real difference between an FPGA and an ASIC, and they have some doubts when choosing which to design a chip with. This article will answer these questions for you from multiple perspectives, so that you can make the right choice when purchasing an FPGA or ASIC.

1.Authoritative knowledge of FPGA

A. what is an FPGA ?

FPGA (Field Programmable Gate Array) is a product further developed on the basis of programmable devices such as PAL (Programmable Array Logic) and GAL (General Array Logic). It appeared as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solved the shortcomings of custom circuits, but also overcome the shortcomings of the limited number of original programmable device gate circuits.

Compared with the traditional mode of chip design, FPGA chips are not simply limited to research and design chips, but can be optimized for products in many fields with the help of specific chip models. From the perspective of chip devices, the FPGA itself constitutes a typical integrated circuit in a semi-custom circuit, which contains digital management modules, embedded units, output units, and input units. On this basis, it is necessary to fully focus on the comprehensive chip optimization design of FPGA chips, and add new chip functions by improving the current chip design, thereby realizing the simplification of the overall structure of the chip and the improvement of performance.

B. What are the types of FPGA ?

FPGAs are divided into three categories based on the application, such as low-end FPGAs, mid-range FPGAs, and high-end FPGAs.

Low-end FPGAs; these types of FPGAs are designed for low power consumption, low logic density, and low complexity per chip. Examples of low-end FPGAs are Altera’s Cyclone series, Xilinx’s Spartan series, Microsemi’s Fusion series, and LatTIce Semiconductor’s Mach XO/ICE40.

Mid-range FPGAs; these types of FPGAs are a solution between low-end and high-end FPGAs, and they were developed to strike a balance between performance and cost. Examples of mid-range FPGAs are Altera’s Arria, Xlinix’s ArTIx-7/Kintex-7 family, Microsemi’s IGL002, and Lattice Semiconductor’s ECP3 and ECP5 families.

High-end FPGAs; these types of FPGAs are developed for logic density and high performance. Examples of high-end FPGAs are Altera’s StraTIx series, Xilinx’s Virtex series, Achronix’s Speedster 22i series, and Microsemi’s ProASIC3 series.

C. How FPGAs Work?

The FPGA is set up by the program stored in the on-chip RAM to set its working state. Therefore, the on-chip RAM needs to be programmed when working. Users can use different programming methods according to different configuration modes.
When powered on, the FPGA chip reads the data in the EPROM into the on-chip programming RAM. After the configuration is completed, the FPGA enters the working state. After a power failure, the FPGA recovers to a white film, and the internal logic relationship disappears. Therefore, the FPGA can be used repeatedly. The programming of FPGA does not require a dedicated FPGA programmer, but only needs to use a general-purpose EPROM and PROM programmer. When you need to modify the FPGA function, you only need to change a piece of EPROM. In this way, the same piece of FPGA, with different programming data, can produce different circuit functions. Therefore, the use of FPGA is very flexible.

D. What FPGAs are usually used for?

1. SOC, the design of an integrated system on a chip. Before the advent of FPGA, the design of digital systems was very complex. Engineers designed circuits, verified them in small batches, and then modified them. It is time-consuming and labor-intensive. After the FPGA appears, digital logic verification can be performed on the FPGA first, which is the so-called programming. After downloading the program, perform functional verification. Modifying the code is certainly much less expensive than producing in small batches. After functional verification, wiring optimization and other steps can be produced into a specific digital logic chip.

2. The algorithm is hardware-based. Originally, there was a special device for digital signal processing, that is, DSP, but FPGA has developed rapidly, and with the increase in the number of on-chip integrated gates, there has been a trend to replace DSP. Simply think of the basic high and low pass digital filters, typically FFT fast Fourier transform, complex theoretical algorithms such as Kalman filtering can be implemented through FPGA, the advantage is that the parallel output speed is fast.

2. Authoritative knowledge of ASIC

A. what is an ASIC ?

ASIC (Application Specific Integrated Circuit) is an application specific integrated circuit, which refers to an integrated circuit designed and manufactured in response to the requirements of specific users and the needs of specific electronic systems.
The characteristics of ASIC are that it is oriented to the needs of specific users, with many varieties and small batches, and requires a short design and production cycle. As a product of integrated circuit technology and a specific user’s complete machine or system technology, it has a larger size than general integrated circuits. Smaller, lighter weight, lower power consumption, improved reliability, improved performance, enhanced privacy, reduced cost, etc.

B. What are the types of ASIC ?

ASIC is divided into full-custom and semi-custom. Full custom design requires the designer to complete the design of all circuits, so it requires a lot of manpower and material resources, and the flexibility is good but the development efficiency is low. If the design is ideal, full custom can run faster than semi-custom ASIC chips. Semi-custom uses the standard logic cells in the library, and can select SSI (gate circuit), MSI (such as adder, comparator, etc.), data path (such as ALU, memory, bus) from the standard logic cell library during design etc.), memory and even system-level modules (such as multipliers, microcontrollers, etc.) and IP cores, these logic units have been laid out, and the design is more reliable, the designer can more easily complete the system design. Modern ASICs often contain entire 32-bit processors, memory cells like ROM, RAM, EEPROM, Flash, and other modules. Such ASICs are often referred to as SoCs (systems on a chip).

C. How ASIC Work?

First, it is necessary to divide the internal functional modules of the ASIC, so that each functional module can realize the corresponding function. The various functional modules are connected together to form the entire ASIC circuit.

Second, according to the division of functional modules, according to the function and interface requirements, hardware description language (HDL) is used to carry out the logic design of the module, and the register transfer level (RTL) code is formed.

Third, according to the functional and timing requirements of the ASIC specification, use the method of field programmable gate array (FPGA) prototype or software simulation, write test code or test stimulus, carry out logic verification, and ensure that the logic design fully meets the design requirements.

Fourth, map the RTL code to the corresponding process library through the logic synthesis tool, perform layout design such as layout and routing, complete timing verification and convergence, and form layout data for film production.

D. What ASIC are usually used for?

ASIC (Application Specific Integrated Circuit) chip is an application-specific integrated circuit. It is a proprietary application chip designed and manufactured from the root level to meet the needs of users for specific electronic systems. Its computing power and computing efficiency can be customized according to the needs of the algorithm. The product of an optimal design of a fixed algorithm. ASIC chip modules can be widely used in artificial intelligence equipment, virtual currency mining equipment, consumables printing equipment, military defense equipment and other smart terminals.

At the hardware level, ASIC chips are composed of basic silicon materials, gallium phosphide, gallium arsenide, gallium nitride and other materials. At the physical structure level, the ASIC chip module is made up of IP cores such as external storage units, power managers, audio and picture processors, and network circuits. The same chip module can carry one or several ASIC chips with the same or different functions to meet one or more specific requirements.

3. ASIC vs FPGA: Which One Should You Choose?

Comparing FPGA and ASIC
Up-front cost Smaller Larger
Per-unit Larger Smaller
Time to market Shorter Longer
Speed Slower Faster
Power consumption Greater Smaller
Update in the field Straightforward Very difficult
Density Lesser Greater
Design Flow Simpler More complex
Granularity Logic blocks Individual cells
Need for gate-level verification Little Much
Technology upgrade path Easier Harder
Additional features Many Fewer

A. Prepaid

ASICs have high upfront costs. First, the cost of ASIC development tools. You need a fairly large toolchain to develop ASICs that you have to rent or buy, and you need to know how to use the tools. If your design team does not have this knowledge, you will need to include the cost of training the team in your list of upfront costs. Also, you will incur considerable NRE (non-recurring engineering) fees, on the order of hundreds of thousands or millions of dollars, that you will pay the silicon foundry to build your ASICs. NRE fees cover mask fabrication and inspection, reserving a spot in the foundry’s busy manufacturing schedule to manufacture your ASICs, die test and sorting, packaging, and final testing. In contrast, FPGAs are off-the-shelf parts, so there are no foundry NRE fees, and FPGA tools are much cheaper than ASIC design tools, roughly three orders of magnitude lower. Depending on the FPGA, you can even buy the part through distribution and get it the next day.

B. Unit cost

This is where ASICs shine. Because you usually design an ASIC to meet your exact design requirements, you only buy the silicon you really want. Little or no waste. So, assuming you have projected product sales to justify creating an ASIC, the unit cost of an ASIC should be lower than an FPGA. This is because FPGA chips are expensive. First, your design may not use 100% of any given FPGA. If you’re lucky, you might get 90% utilization. Often, you may not be able to use up to 10% or more of the FPGA resources to meet routability and timing goals because routing congestion is too high, and if you try to use the entire FPGA, the signals become too long and slow. Additionally, the signal routing matrix on the FPGA is extensive to ensure that you can route your design on the FPGA.

C. Time to market

FPGAs are by far the time-to-market leader. If you are ready to manufacture the pcb, it can be shipped the same day the FPGA design is complete. All you need to do is to flash the final configuration to the EEPROM on the board, test it, package it and ship it. Instead, when you finish your ASIC design, you ship the design to a silicon foundry and have a tape-out party. Then you wait a few months while the foundry takes your design, inspects, manufactures the chip, tests the chip, packages the chip, and ships the packaged ASIC back to you. When you receive the finished ASIC box, you can build and test your board. Meanwhile, a similar product from a competitor, but based on an FPGA, will be available in your market for the months you wait to get your ASIC back from the foundry. If time-to-market is critical to you, then an FPGA may be the best choice for you.

D. Speed

Assuming your designers know what they are doing, ASICs extract the highest performance from any given IC process node. Due to the large (capacitive) programmable routing matrix of the FPGA, the performance of any given IC process node will lose about an order of magnitude relative to the performance of the ASIC

E. Power consumption

This is not obvious, but the low silicon efficiency of FPGA in terms of unit cost and speed also increases the power consumption of FPGA relative to ASIC. All these additional routing matrix transistors on the FPGA leak, resulting in higher static power consumption. Due to the Manhattan cabling required in an ordered FPGA, the longer cabling inherent in the FPGA will add capacitance to each cabling, resulting in higher dynamic power consumption. However, FPGA vendors can counter the extra power consumption in their FPGAs

F. Live Update

It’s an easy one to understand. SRAM-based FPGAs are easily reprogrammed in the field. Change the configuration stored in flash and update your design. In the early days of an FPGA design, you had to unplug the EPROM or EEPROM of the old configuration from its IC socket and insert a new configuration to perform a field update. Today, you will most likely be reprogrammable through the USB or JTAG ports. Some final product designs allow over-the-air updates, although there are many security concerns with allowing over-the-air hardware updates.

Conversely, updating an ASIC often requires a board change (called a door-to-door service in the wireless industry). Some ASIC designs incorporate embedded FPGA (eFPGA) fabrics from eFPGA vendors such as Achronix, Flex Logix, Menta, or QuickLogic to enable a limited number of field updates without on-site service. If you want to take this approach, you can even get an open source FPGA fabric generator and toolset called OpenFPGA. But if you embed an FPGA fabric in an ASIC, the ASIC becomes an FPGA, doesn’t it?

G. Design density

Because device density is closely related to unit cost, the same argument applies to FPGAs vs. ASICs, with just a little extra. In any given process technology, you can always design a larger device, an ASIC with more resources, due to the routing overhead and resource utilization limitations of the FPGA, as described above

H. Design Flow

Unlike ASICs, the physical design of an FPGA is done for you and verified by the FPGA vendor before you see the device, albeit with errata. You will typically use one vendor’s toolchain to design FPGA configurations, although some wealthy design houses use ASIC-level place-and-route tools from one of the three major EDA vendors: Cadence, Siemens/Mentor, and Synopsys. For ASIC design, you would typically take a mix-and-match approach, buying EDA tools from the big three EDA companies and maybe some additional design tools from new EDA startups that haven’t been absorbed by one of the big three EDA companies.

I. Granularity

The digital granularity of an ASIC is a gate, or in some cases, a transistor. FPGAs must have coarser granularity, on the order of one logic unit. Otherwise, the routing overhead of the FPGA becomes completely impractical. This granularity difference between ASICs and FPGAs results in the higher unit cost and relative lack of density of FPGAs.

J. Requires gate level verification

FPGAs require the same design-level verification as ASICs. However, FPGAs are not fine-grained at the gate level, so they do not require gate-level verification. You place every gate in the ASIC design, so you need to verify every gate

K. Technology upgrade path

In theory, it would be easier to upgrade from one FPGA family to the next within an FPGA vendor’s product line. For example, it is relatively easy to migrate a design through three Xilinx 7 series devices: Artix, Kintex, and Virtex. However, migrating to another vendor’s FPGA also means migrating to another FPGA vendor’s design tools, which isn’t particularly easy, although it’s not as difficult as some might think. Engineers have managed to master more than one FPGA vendor’s toolchain. They just complain a lot when making changes. There is no technology upgrade path for ASICs. To upgrade an ASIC, you need to design, verify and manufacture a new ASIC.

L. Additional features

Here I have to be different from the graph above. Although FPGA vendors have long sought additional functional blocks to add to their FPGAs, almost anything available on an FPGA can be designed as IP or purchased and placed on an ASIC. It may not be easy, but it is usually possible. Statements about ASIC IP include embedded FPGA IP. Perhaps this diagram is meant to show that it’s easier to take advantage of the many other cutting-edge features that FPGA vendors cram into their parts. For example, FPGA vendors have been leading the way in high-speed SerDes designs for the past 20 years. If you want a fast SerDes, you’ll probably find the fastest on the latest devices from FPGA vendors, especially Achronix, Intel, and Xilinx.

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